TRST Statement                                                                                                                           

Describes the operation of the optional Test Reset signals.

TRST trstmode

Arguments

trstmode

        Specifies whether the TRST line is active, inactive, is high impedance or even exists. Valid trstmode states are:

                ON.................Active (Logic 0)

                OFF...............Inactive (Logic 1)

                Z....................High Impedance

                ABSENT.........Not present

                TST1.............Port 1 Pin 9 & Port 2 Pin 6

                TST2.............Port 1 Pin 11 & Port 2 Pin 8

                TST3.............Port 1 Pin 13 & Port 2 Pin 7

                TST4.............Port 1 Pin 14                           AP-214 Only

                TST5.............Port 1 Pin 3 or J2.5 or J2.7       AP-214 Only 

Remarks

GPIO pin 1 (TST1)  is the default pin unless specified. The pin defaults to ABSENT until specified.

Examples

     TRST ON      // Test TST1 to logic 0

     TRST OFF     // Test TST1 to logic 1

     TRST TST2   // Select TST2 as the GPIO to control

     TRST ON      // Test TST2 to logic 0