The Need for JTAG

Increased device density and BGA packaging has made it impossible to fully test a PCB using traditional testing methods as the number of pins and the ability to access them becomes more and more difficult.

The Joint Test Action Group was created to find a solutions and the IEEE standard 1149.1: Standard Test Access Port and Boundary Scan Architecture was created. This standard is known known by the acronym JTAG.

This standard allowed a devices pins to be read and written without direct physical access. This mechanism is called boundary scan.

Boundary scan works by connecting all of the devices pins in a serial chain known as the Boundary Scan Register (BSR). All of the pins registers called cells as only available the the scan mode is activated. This allows the pins direction and value to be set regardless of the internal core logic and also allows the pin to be read. Cells can be of different types as these are later.

Interface

The JTAG interface, collectively known as a Test Access Port, or TAP, has four mandatory signals. These are

Signal	Function	Sample	Description
TCK	Test Clock	-	Clock for the TAP State Machine
TDI	Test Data In	Rising edge	Data shifted in to the test device
TDO	Test Data Out	Falling edge	Data shifted out of the test device
TMS	Test Mode Select	Rising edge	Use to determine the TAP state machines next state

There is also an optional signal called TRST (Test Reset) which can be used to reset the state machine. Resetting the state machine can also be achieved by clocking the TAP controller five times with TMS high.

Test Access Port (TAP) Controller

The TAP controller is a state machine that controls the JTAG system. The TAP controller is controlled by the TMS signal. This is shown below. The value of TMS used to move to the next state is also shown.

There are two registers in the TAP Controller. The instruction register (IR) holds the current instruction. This instruction controls the data register DR) that is used to access the data in that register. Typical instructions are:

Instruction	Function
BYPASS	This instruction causes the DR to be a single single-bit register (the BYPASS register). This instruction improves the performance of testing of other devices in the JTAG chain by reducing the length of the overall JTAG chain
IDCODE	The DR register will contain a specific value. This allows the devices in the JAG chain to be determined
EXTEST	The DR register is connected to the Boundary Scan Register (BSR). The device’s pin states are sampled with the capture_dr JTAG state and new values are shifted into the BSR with the shift_dr state; these values are then applied to the pins of the device using the update_dr state.
INTEST	The DR register is connected to the Boundary Scan Register (BSR). While the EXTEST instruction allows the user to set and read pin states, the INTEST instruction relates to the core-logic signals of a device.
SAMPLE	The DR register is connected to the Boundary Scan Register (BSR) but the devices functional mode is not changed. This allows you to take a sample of the BSR effectively a sample all of the pins that are entering and leaving the device.

JTAG Uses

1) Programming

Infinity Express

A collection of programming tools to program SVF, JAM or JBC files. These are standard file formats that are generated by tools such as Quartus II.

Click here for further details

Infinity JN516X

Programs NXP JN5161/4/8/9 Device using JTAG for faster programming. It supports programming of both the boot and application memories and can be used as a GUI or as a command-line. Additionally all configuration options and custom MAC addresses are supported.

Click here for further details

PIC MX32 Programming

Programs Microchip MX32 device using JTAG even when the device is part of a larger JTAG chain. The software can used as a GUI or command-line options and supports boot sector and application sector programming

2) Production

JTAG Boundary Scan Testing

Improve test times as programming/testing can be achieved with fast JTAG testing and programming using one test fixture

Infinity SCAN

Infinity SCAN can perform boundary scan testing in two ways

Automatic testing. A training feature means that Infinity SCAN can learn the status of the board by itself so that each pin can have rules applied to it
Netlist testing. I list of nets can by either automatically discovered or manually entered in the software. Each net can then be tested to ensure that all nodes of the net are connected correctly and that no other pins toggle.

The JTAG scan chain can be auto detected and a production plugin allows test data to be saved to an SQL database ensuring full traceability. Click here for further details.

Infinity APEL

APEL is a JTAG Embedded-test Language that allows the pins on the JTAG chain to be directly accessed. This allows rapid test development of scripts that can be combined with Infinity Scan testing for extended test coverage. APEL has a Full Development Environment as well as ActiveX objects and console mode applications and the ability to compile scripts to run at remote sites without having to release source code. Click here for further details.

What about devices that are not JTAG enabled?

Sensors with SPI and I²C interfaces and many silicon devices such as flash and RAMs do not normally have JTAG interfaces. Does this means that the devices cannot be tested?

Infinity SCAN will still be able to check for short circuits and missing pullups. Infinity APEL with its scripted language allows pins to be controlled and read from a script. This means that devices can tested and programmed even thought they are not connected on the JTAG chain. Click here for further details.

3) Development and Debugging

Infinity SCAN and APEL can also be used during the development phase. SCAN can be used to verify functionality and connectivity. APEL can be used to test interfaces. Starting development with the Infinity Suite during the development phase allows reuse and scripts and SCAN training data during the production phase improving the time to market.

4) Infinity Database

All of the Infinity Suite uses the Infinity Database. This database is customisable and allows additional parts to be imported via BSDL files and also allows packages to be created. See Database for more information